<hardware, integrated circuit> (GAL) A newer kind of Programmable Array Logic based on EEPROM storage cells, been pioneered by Lattice. GALs can be erased and reprogrammed and usually replace a whole set of different PALs (hence the name). (1995-12-09)

The Generic Array Logic (also known as GAL and sometimes as gate array logic) device was an innovation of the PAL and was invented by Lattice Semiconductor. The GAL was an improvement on the PAL because one device type was able to take the place of many PAL device types or could even have functionality not covered by the original range of PAL devices.

<hardware> (FPGA) A gate array where the logic network can be programmed into the device after its manufacture. An FPGA consists of an array of logic elements, either gates or lookup table RAMs, flip-flops and programmable interconnect wiring. Most FPGAs are reprogrammable, since their logic functions and interconnect are defined by RAM cells. The Xilinx LCA, Altera FLEX and AT&T ORCA devices are examples. Others can only be programmed once, by closing "antifuses". These retain their programming permanently. The Actel FPGAs are the leading example of such devices. Atmel FPGAs are currently (July 1997) the only ones in which part of the array can be reprogrammed while other parts are active. As of 1994, FPGAs have logic capacity up to 10K to 20K 2-input-NAND-equivalent gates, up to about 200 I/O pins and can run at clock rates of 50 MHz or more. FPGA designs must be prepared using CAD software tools, usually provided by the chip vendor, to do technology mapping, partitioning and placement, routing, and binary output. The resulting binary can be programmed into a ROM connected to the FPGA or downloaded to the FPGA from a connected computer. In addition to ordinary logic applications, FPGAs have enabled the development of logic emulators. There is also research on using FPGAs as computing devices, taking direct advantage of their reconfigurability into problem-specific hardware processors. Usenet newsgroup: news:comp.arch.fpga. (1997-07-11)